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| THURSDAY, June 10, 2004, 2:00 PM - 4:00 PM | Room: 6C | ||
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TOPIC AREA: NANOMETER ANALYSIS AND SIMULATION | ||
| SESSION 48 | |||
| Interconnect Extraction | |||
| Chair: Yehia Massoud - Rice Univ., Houston, TX | |||
| Organizers: Sachin S. Sapatnekar, Jamil Kawa | |||
| This session presents new developments in the area of 3D parasitic extraction. The first paper performs capacitance extraction under multi-dielectric environments. Next, a parasitic extractor for microelectronics, multichip modules and MEMS which combines the fast multipole method with QR matrix compression is presented. The third paper shows a method for determining inductive noise coupling. A full wave field solver for RF, analog and high-speed digital circuits is presented next. Finally, a presentation on a technique that develops closed-form expressions for distributed RC interconnects rounds out the session. | |||
 48.1 |
Sparse Transformations and Preconditioners for Hierarchical 3-D Capacitance Extraction with Multiple Dielectrics |
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| Speaker(s): | Shu Yan - Texas A&M Univ., College Station, TX | ||
| Author(s): | Shu Yan - Texas A&M Univ., College Station, TX Vivek Sarin - Texas A&M Univ., College Station, TX Weiping Shi - Texas A&M Univ., College Station, TX | ||
| 48.2 | A Fast Parasitic Extractor Based on Low Rank Multilevel Matrix Compression for Conductor and Dielectric Modeling in Microelectronics and MEMS | ||
| Speaker(s): | Dipanjan Gope - Univ. of Washington, Seattle, WA | ||
| Author(s): | Dipanjan Gope - Univ. of Washington, Seattle, WA Swagato Chakraborty - Univ. of Washington, Seattle, WA Vikram Jandhyala - Univ. of Washington, Seattle, WA | ||
| 48.3 | CHIME: Coupled Hierarchical Inductance Model Evaluation | ||
| Speaker(s): | Satrajit Gupta - Carnegie Mellon Univ., Pittsburgh, PA | ||
| Author(s): | Satrajit Gupta - Carnegie Mellon Univ., Pittsburgh, PA Lawrence T. Pileggi - Carnegie Mellon Univ., Pittsburgh, PA | ||
| 48.4s | Large-Scale Full-Wave Simulation | ||
| Speaker(s): | Sharad Kapur - Integrand Software, Inc., Hoboken, NJ | ||
| Author(s): | Sharad Kapur - Integrand Software, Inc., Hoboken, NJ David E. Long - Integrand Software, Inc., Hoboken, NJ | ||
| 48.5s | Closed-Form Expressions of Distributed RLC Interconnects for Analysis of On-Chip Inductance Effects | ||
| Speaker(s): | Yuichi Tanji - Kagawa Univ., Takamatsu, Japan | ||
| Author(s): | Yuichi Tanji - Kagawa Univ., Takamatsu, Japan Hideki Asai - Shizuoka Univ., Hamamatsu, Japan | ||
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